We are using Xilinx VC707 board which consists of ADV7511 device for HDMI interface. We were able to display individual frames on HDMI reference design from Analog devices targeted for Virtex7. But when we are simultaneously writing video frame data from a source to a DDR3 address without any delay between frame writes, some garbage output is being displayed in-between frames. We are posting video snapshot of the HDMI output, Part of api c code file. This is with a delay of 3ms between each frame write to DDR3 memory. Any help in resolving the issue will be appreciated.
1) Read packed YCbCR 420 data to DDR3 from a sample .YUV(30 frames,1920x1080) file.
2) Converted 420 YCbCr to ARGB 888 format frame by frame and written back to DDR3 and started HDMI driver.
3) Updating DDR3 location after every YCbCr 420 to ARGB888 frame conversion is done.
Thanks and regards