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AD9129 data issues

Question asked by HankZ on Aug 8, 2013
Latest reply on Aug 23, 2013 by danf

I am using the AD9129 and it looks like I’m having some data issues.

 

I can read/write registers over the SPI interface, and I think I have the DAC set up the right way.

(writing the registers per Table 16 in the data sheet and verifying them when read back).

 

I am using the DAC below the maximum sample rate, and sending a CW tone (DDR mode for the DAC).

 

When I look at the data on the spectrum analyzer, I can see my tone but it’s in the middle of lots of other garbage (better or worse depending on the frequency).

 

When I query the DLL register (0x0E) I get “0x85” which means the DLL is locked but is “sampled on incorrect phase” (bit 3).

 

I ran SED test with alternating data patterns and verified that data is arriving correctly.

I also intentionally mangled the data and verified that SED fails.

 

I had this same type of FPGA talking to the AD9129 eval board without any problems.

Is there a way to dump registers from the AD9129 GUI?

 

Besides SED and verifying the DLL lock, are there other things I should be checking (the data sheet is a little sparse on details concerning some of the registers).

 

Any suggestions would be appreciated.

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