ADMP421 tristated output

Discussion created by frankd on Aug 7, 2013
Latest reply on Aug 8, 2013 by JeradL


I’m hoping you can help me work through an issue I’ve run into with the ADMP421 digital microphone. I understand the format of the pulses now, but the output doesn’t behave exactly like what’s shown in the data sheet.


The microphone has an input to designate it as the right channel or the left channel of a stereo pair. This was done so two microphones can be multiplexed onto one data line – one side’s data is valid on the rising edge of the clock, the other side’s data is valid on the falling edge of the clock. The data sheet shows the output tri-stating during the half clock cycle when its data is not valid.


The result of this should be that for a given clock edge (rising or falling, depending on the configuration of the microphone as left or right) the output should be either high (pulse present) or low (pulse absent). For the other half cycle, the output should tri-state. That means I should be able to put a pull-down resistor on the output so that it always goes low during the half clock cycle when it’s tri-stated. The result should be the output will either be high or low for the first half of the cycle and always low for the second half of the cycle.


I’m finding that I have to use a very strong pull-down to get the output to go low when it’s supposed to be tri-stated. I started with a 33K resistor, went down to a 4.7K resistor, and finally went down to a 1K resistor to get the output to go low with a reasonably fast falling edge when it should be tri-stated. It’s almost acting like the output has a hold function that holds the output at whatever state it was at when active – but that wouldn’t work well when two microphones are mux’d on the same line.


When I put a 1K pull down resistor on the output, not only is the falling edge rate surprisingly slow, but the high level is reduced. The mic is powered by a 2.5V rail but the high output value is now below 2V with a 1K pull down resistor.


Can you tell me what is going on with the ADMP421 output during the half cycle it’s supposed to be tri-stated?


Thank you,