Hi guys,

In order to get more processor resources, I would like to replace my IIR coded function with the IIR Accelerator available with the ADSP-214xx.

Until now, I used the biquad function of the AD lib, clearing the bit RND32 of MODE1 to have more precision (and setting it back to 1 at the end of the biquad function). So all my data (input, output and coefficients) were in 32 bits but the intermediate calculations were in 40 bits.

Now, I would like to do the same thing but with the IIR Accelerator. I was able to make the IIR Accelerator works in 32 bits. But when I do the changes to go to 40 bits to have more precision, I have some problems.

I've adaptated the format of my data (input, output and coefficients) to match the 40 bits representation that the DMA expects (for 1 value, 2 internal memory spaces: first one for the 32 bits of the mantissa, second one for the 8 bits of sign and exponent). And I've set the IIR_FORTYBIT of IIRCTL1.

During the first iteration everything goes well. I do have the expected outputs. But the coefficients are already corrupted because the IIR accelerator writes the Dk values in each 6th and 7th memory spaces of the corresponding filter. So it writes at the same place that in 32 bits whereas in 40 bits each value is coded on 2 memory spaces and not just 1.

And if I don't set the IIR_SS to save those Dk values, the results are not good at the second iteration...

I could have a workaround if the Dk values were the good ones (re sorting my coefficients buffer after each execution of the IIR accelerator) but it's not the case.

I attach my code. Maybe there is something wrong and obvious but I can't see it for the moment...

So if anyone has an idea or a comment, I'll be pleased to read it!

Thank you guys!

Hi ,

The issue has been solved. The IIR Accelerator works as expected on the EZ-Kit with both the IIR_FORTYBIT and IIR_SS bit set . The problem seems to be with the Simulator.

The simulator updates the Dk values in the wrong place(5 and 6) instead of (10,11,12,13) when the IIR_FORTYBIT and IIR_SS bit are set.

Regards,

Mahesh