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FMCOMMs1-EBZ reference design when DDS DDR interpolation is disabled

Question asked by Marchzh on Jul 31, 2013
Latest reply on Jul 31, 2013 by rejeesh

  Hi,

     We are testing the fmcomms1-ebz using the reference design(edk_14_4_3013_04_04 reference design).Here is two points I don't understand.

    (1) When the SDK project is running with nothing changed from the reference design, everything seems to be ok and the sine wave on chipscope is perfect. But there will be a noise clutter for about 1 second every 13 seconds, and it is very regular.  When we changed to use dac_dma_setup() instead of dds_setup() (want to send DDR sine data in test.c) in main.c, it is the same as what described above.

    The normal sine wave is:

normal sine wave.jpg

    The noise clutter for about 1 second every 13 seconds is

noise clutter for about 1 second every 13 seconds.jpg

 

(2)  As above, we changed to use dac_dma_setup() instead of dds_setup()  in main.c, and change Xil_Out32((dac_baseaddr+0x04), 0xf) to Xil_Out32((dac_baseaddr+0x04), 0x7) at line 331 of test.c in order to disable the interpolation. In my opinion, now the data in DDR (dac_dma_data[1024]) should be transmitted in the order by DAC. But the fact seems not to be that. What we received is not sine wave as below.

(The key parameter is: adcsampling 100M, dacsampling 100M, rx gain 5dB, tx and rx center frequency 2.2GHz.)

when DDS DDR interpolation is disable.jpg

     Can any one explain this?

     Thank you!

 

     Zhonghua He.

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