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ADV7182 - Takes 1 full minute to sync to any composite camera

Question asked by rmsteele on Jul 28, 2013
Latest reply on Aug 26, 2013 by Sureshd

On my previous board design I used the ADV7180 which worked very well. I could power up the board cold with a camera plugged in and it would sync up instantly. This time I designed two ADV7182's onto my new board and now I have a strange anomaly. If I remove power from the board for about a minute or if I power up the board for the first time for the day the ADV7182's take a full minute to sync to any composite camera that is plugged into any CVBS input port. I have tried 6 completely different types of cameras from inexpensive board cameras to high end camcorders. They all do exactly the same thing. As the one minute mark approaches it starts syncing up then locks and stays locked as long as power is applied and the board is not allowed to cool down. I can even power it down for a few seconds then plug it back in and it will sync right back up. But if I let the board cool down for a couple of minutes then plug it back in it will take a full minute for the ADV7182 to sync to the camera again. Below is a video example of the problem. It is not the full minute. Below that are the register settings I am currently using to coinfigure the ADV7182.

I used the example schematic in the ADV7182 datasheet to implement the ADV7182 in my design.

Thanks for any suggestions anyone may have.

 

 

 

Below is how I am currently configuring the ADV7182.

 

static tI2CRegs ADV7182Config[] =

{

// Soft reset the video decoder and start off with defaults

{ 0x0F, 0x80 /*, 6, true*/ }, // issue RESET and wait 6ms before continuing (ignore No Acks). This also powers up the decoder

 

// Main page

{ 0x0E, 0x00 }, // SUB_USR_EN: Main page

{ 0x00, 0x00 }, // CVBS (Composite) input on AIN1

{ 0x01, 0xC8 }, // ENHSPLL: HSync enabled, BETACAM: Standard video input, ENVSPROC: VSync enabled

{ 0x02, 0x14 }, // VID_SEL: Auto-detect PAL B/PAL G/PAL H/ PAL I/PAL D, NTSC M (pedestal), SECAM

{ 0x03, 0x0C }, // TOD: Output drivers enabled

{ 0x04, 0x3D }, // ITU-R BT.656-3, TIM_OE(HS, VS, FIELD active), BL_C_VBI: Blank Cr/Cb during VBI, Extended Range

{ 0x0F, 0x00 }, // PWRDWN: System functional

{ 0x14, 0x01 }, // CCLEN: Current sources enabled, FREE_RUN_PAT_SEL: 100% color bars [0:DEF_C/Y, 1:Color Bars, 2: Luma ramp, 3:Boundary Box]

{ 0x18, 0x13 }, // WYSFMOVR: Auto-select of best filter

{ 0x1D, 0x40 }, // TRI_LLC: LLC pin active

{ 0x31, 0x02 }, // NEWAVMODE: EAV/SAV codes generated to suite ADI encoders, HVSTIM: Start of line relative to HSE

{ 0x37, 0x01 }, // PHS: HSync active high, PVS: VSync active high, PF: Field active high, PCLK: LLC normal(timing diagrams)

{ 0x3A, 0x01 }, // MUX_PDN: Allow powerdown of MUXs, unused channels auto-powered down

{ 0xF4, 0x00 }, // <Drive Strength> Data: 1x, Clock: 1x, Sync: 1x

 

// User Sub Map 2 page

{ 0x0E, 0x20 }, // SUB_USR_EN: User Sub Map 2 page


// Interrupt/VDP page

{ 0x0E, 0x40 }, // SUB_USR_EN: Interrupt/VDP page

{ 0x40, 0xD0 }, // <Interrupt Config1> INTRQ_DUR_SEL: Active until cleared, INTRQ_OP_SEL: Open drain

 

{ 0x0E, 0x00 } // SUB_USR_EN: Main page

};

 

Message was edited by: Rick Steele Old settings crept into the code. I have applied the new settings for the ADV7182. It syncs up instantly now. Works great and have a perfect picture. Thanks...

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