Hi, I am using AD9517-4 as the clock generator with 10M single ended reference clock. However, I cannot get my PLL locked. So I want to know how to config my loop filter and N/R divider? I also notice that ADclkSim tells the internal VCO can have a range from 1.45G ~ 1.8G. How can I determine a fixed frequency, such as 1.5G or 1.6G? Thanks for any reply!