AnsweredAssumed Answered

Possible bug in core timer example from CCES SHARC example download

Question asked by MikeSmithCanada on Jul 22, 2013
Latest reply on Jul 23, 2013 by CraigG

#pragma optimize_for_speed /* interrupt handlers usually need to be optimized */

#pragma section ("seg_int_code")  /* handler functions perform better in internal memory */

static void timer_isr(uint32_t iid, void* handlerArg)

{

    volatile int *timer_counter = (int *) handlerArg;

    *timer_counter += 1;

 

} /* timer_isr */

#pragma optimize_for_speed /* restore the optimizer settings to those for the build configuration */

 

How does the last #pragma  reset the optimizer settings?

From help -- I think it should be either


#pragma optimize_as_cmd_line
This pragma resets the optimization settings to be those specified on the ccblkfn command line when the compiler was invoked


#pragma optimize_off
This pragma turns off the optimizer, if it was enabled. It has the same effect as compiling with no optimization enabled.

 

Regards

Mike

Outcomes