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ADV7391 memory interface

Question asked by hercules on Jul 17, 2013
Latest reply on Jul 18, 2013 by DaveD

This may be true but not sure. If the memory contains 4:2:2 frame bytes then all i think I need to do is provide pixel clock to clock in and the data bus from memory. I don't think the HSYNC and VSYNC ijnputs are required as the timing information is in the 4:2:2 standard.

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