hi! what is the maximum PSK frequency? Frequency can be more 500 kHz? Thanks.
The PSK frequency is limited by the loop filter bandwidth (LBW). You can use the FSK feature in ADIsimPLL to get an estimate. The PSK function is implement by doing a very small frequency kick, so we can mimic the functionality using the FSK feature with a tiny frequency step, e.g. 50 Hz.
I did a quick simulation to demonstrate. The PSK frequency (Data Rate) is 200 kHz and the LBW is 250 kHz. See output (ignore the first 10 microseconds):
Now, using a Data Rate of 500 kHz and a LBW of 500 kHz:
Note the 'noise' on the signal due to the wider loop filter bandwidth.
Basically, the faster you want your data rate to be, the wider LBW needed. The wider the LBW is, then the faster the output will settles to the required output. You should be able to achieve 500 kHz but you will need a wide loop filter bandwidth - which results in high phase noise and less filtering of spurs.
Free download and basic tutorial of ADIsimPLL here: www.analog.com/adisimpll
Tutorial video for ramping, which is similar to FSK, here: http://ez.analog.com/docs/DOC-2419
Hi! Please help me to configure ADF4159 in PSK mode.
VCO is ADF4351. Frequency 1600 MHz. TxData clocked 500 kHz, but on pin CP ADF4159 const level.
Your register settings look ok, except I think you need to disable Phase Adjust in Register 1. Phase Adjust and PSK are different features.
The change on the ADF4159 CP pin is tiny. You probably won't be able to see it. Do you have a method of monitoring the phase of the VCO output?
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