I have made a Video Encoder board following the exact schematic as of P160 Evaluation Kit with the host-controller being a DSP rather than an FPGA. I have been able to configure ADV212 successfully and read back the application id (0xFF82). I also configured ADV7189B according to the recommended settings in the datasheet. I read back all the registers from ADV7189B and matched with what I had actually written. All the registers match the programmed value except for 3 registers at addresses 0xD0,0xD5 and 0xD7. The value read back from these registers does not match the ones I have written. The recommended settings in datasheet were for CVBS input at AIN5 but in my case it is at AIN1 so I changed the value at 0x00 register accordingly. After connecting the camera, I read the status register of ADV7189B and find that its lock bit is asserted and the format detected is also correct (PAL). However, ADV212 SCOMM[3:0] pins are constantly held at a value of 0x7 (after configuration) which indicates that it is waiting for the video. I checked the HS,VS,Field and signals of ADV7189B and they appear to be generated correctly. I have tried both input format, HVF as well as embedded EAV/SAV, in ADV212 encode parameters but no difference observed.So, I have the following queries:
1) What can be the reason that registers 0xD0,0xD5 and 0xD7 does not return the same value as written to them?
2) Is there any register in ADV7189B to control inclusion or exclusion of EAV/SAV information in pixel data?
3) How can it be verified that the pixel data output by adv7189b is correct?
4) What configuration missing in adv212 or adv7189b can cause this type of problem?
5) If both ICs are supposed to be working fine what other issue can it be?noise or ringing on pixel data bus?
6) What other observations can be made to drill down the problem?
Thanks in advance!