I have a question regarding Core clock 0.
We disabled Core 0 from core 1 and then Disabled Core Clock 0 using DPM0_CCBF_DIS register.
We noticed that DPM0_CCBF_STAT_STKY register gets updated to show that core clock 0 is disabled and not DPM0_CCBF_STAT register.
1.Why is DPM_CCBF_STAT not updated.
2. Can core clock 0 be disabled ? If yes , How?
Thanks and regards,
Sankar B S