Can you tell me what the tradeoffs are in terms of lock and settling times for a DDS and a PLL?
From a high level, DDS devices essentially lock and settle immediately, whereas all PLLs will exhibit some ringing or settling time, but understanding some of the details may help you pick the right solution for your case. PLLs settling and lock times are primarily a function of theie loop filter bandwidth. There is, in general, a trade off relationship between stability/noise immunity and settling/lock time. There are PLLs on the market which use a second 'Ping pong"-ing PLL which can be programmed and left to settl before swithcing over to it, or which offer a dynamic loop filter bandwidth (wider when settling, narrower when stable) in an effort to improve both of these elements at the same time.
While DDS devices essentially lock and settle immediately, when examined carefully, that doesn't tell the whole story. First off, there is a latency between the time when a new profile is programmed and when it actually is represented on the output signal seen. The magnitude of the latency is inherently longer for phase adjustments than it is for amplitude adjustments, and it is inherently longer for frequency adjustments than it is for phase adjustments. Most DDS devices offer the option to implement a matched latency function, allowing the designer to choose to delay any amplitude and/or phase adjustment so that the output signal exhibits any concurrent changes on output at the same time.
In addition to latency, though, there is something about a DDS frequency change that looks a little like a frequency settling characteristic. The difference between setting an FTW of 999 and and FTW of 1000, is one LSB value. If you take two DDS engines in parallel and program them to that small a difference, the output signal you will get from the two devices will look exactly them same until the DDS accumulator has rolled that LSB value change all the way up to the phase truncation level. This could be 2^17 cycles, or even more. If one were to consider this a settling time, then the DDS will settle to the depth of the phase truncation function immediately (the output will be at a different level if the frequency change is > than the LSB value of the truncated phase accumulator prior to the angle to amplitude conversion step). Then, over the next (X) number of cycles, as nonzero values roll up to the truncated phase level, it will continue to be differentiatable (if you'll allow me to make up a word) more and more. This isn't truly or precisely a settling time, but it is somewhat akin to one.
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