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Problem with arranging output sections in memory by ldf file.

Question asked by lekigo on Apr 9, 2010
Latest reply on Apr 16, 2010 by kenb3

Hello!

 

Processor: ADSP-BF534

VDSP 5.0 Update 6

License: Full (ADI)

Session: Emulator HPUSB-ICE

ADI software modules: not used

 

I make my own LDF file because I need to place code and const data into the external flash memory. Also my processor starts in bypass mode, so I use Memory Initializer and put relevant output sections bsz_init and .meminit into the LDF. All works well.

Now I need to place some data at fixed address at the end of firmware. And here I was confronted with difficulties. I put my variable (StartBank) in unique named section in different .c file, then make corresponding changes to LDF:

 

file start_bank.c:

 

#pragma symbolic_ref

#pragma section("StartBankSection")

const unsigned short StartBank = 0;

 

LDF file:

...

RESOLVE(_StartBank,  0x20004000)
...
  KEEP(_start, _main, _ConstSectAnchor, ___inits, _StartBank)
  SECTIONS
  {
      ASYNC0_code_boot
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS{requiredForROMBoot}(program) $LIBRARIES{requiredForROMBoot}(program))
         INPUT_SECTIONS($OBJECTS{requiredForROMBoot}(L1_code) $LIBRARIES{requiredForROMBoot}(L1_code))
         INPUT_SECTIONS($OBJECTS(program) $LIBRARIES(program))
         INPUT_SECTIONS($OBJECTS(L1_code) $LIBRARIES(L1_code))
      } > MEM_ASYNC0
      ASYNC0_constdata
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS{requiredForROMBoot}(constdata) $LIBRARIES{requiredForROMBoot}(constdata))
         INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
      } > MEM_ASYNC0
      bsz_init
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(bsz_init) $LIBRARIES(bsz_init))
      } > MEM_ASYNC0
      .meminit
      {
         ALIGN(4)
      } > MEM_ASYNC0
      ASYNC0_start_bank
      {
         INPUT_SECTION_ALIGN(2)
         INPUT_SECTIONS(start_bank.doj(StartBankSection))
      } > MEM_ASYNC0
...

 

And I got this arrangment of sections:

 

 

 

 

Memory MEM_ASYNC0

Output section Type Start address Size in words
ASYNC0_code_bootSHT_PROGBITS0x200000000x1c48
ASYNC0_constdataSHT_PROGBITS0x20001c480x190
bsz_initSHT_PROGBITS0x20001dd80x4
ASYNC0_start_bankSHT_PROGBITS0x200040000x2
.meminitSHT_NOBITS0x20004002

0x0

 

 

(Memory Initializer outputs an error: "[Error mi0040]: .meminit has no enough space to hold the processed data. Additional space required: 0xE8C."

0xE8C is the size of .meminit section when I not restrict address of StartBank variable)

 

A questions arized from above result:

1) why section .meminit is placed after section ASYNC0_start_bank, but in ldf it is mentioned before?

2) why Memory Initializer can not find enough space, but there is a lot memory till to the end of MEM_ASYNC0?

 

Next I make some change in ldf:

 

 

      ASYNC0_code_boot

      {

         FORCE_CONTIGUITY

         ...
and got this result:

Memory MEM_ASYNC0

Output section Type Start address Size in words
ASYNC0_code_bootSHT_PROGBITS0x200000000x9b6c
ASYNC0_constdataSHT_PROGBITS0x20009b6c0x190
bsz_initSHT_PROGBITS0x20009cfc0x4
ASYNC0_start_bankSHT_PROGBITS0x200080000x2
.meminitSHT_PROGBITS0x200000de0xe8c

 

Memory Initializer was successful but arrangment is not that I wanted.

 

A questions arized from above result:

1) why section ASYNC0_code_boot is not continuos and flows around sections ASYNC0_start_bank and .meminit?

2) Why sections bsz_init and ASYNC0_constdata are placed after section ASYNC0_start_bank, but in ldf it is mentioned before?

 

So the following common question is arizing from all these issues:

How the linker process output sections exactly? In what order? From linker manual it follows that linker fills output sections in order they are mentioned in SECTIONS command (with the exception of INPUT_SECTIONS_PIN_EXCLUSIVE command), but results I got are different.

Also, does a restriction of addresses by RESOLVE command influences on that order?

 

Thanks.

 

Message was edited by: lekigo. There was a error in first table "Memory MEM_ASYNC0" - ASYNC0_start_bank start address value and .meminit start address value must be equal to 0x20004000 and 0x20004002 because _StartBank's address is resolved to 0x20004000. Erroneous values were taken from other run.

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