Running VDSP 5.0 Update 7 - BF531 in a custom target that has been in production for several years - ICE-100B JTAG emulator.
I have a program that runs out of the target SDRAM. I have a custom board XML file to init the ASYNC chip selects and SDRAM registers.
Previously, I could set software breakpoints in my software, run, step, etc., and the disassembly window and source windows stayed in sync.
Today, only the hardware breapoints work, run, step works, but the source window doesn't sync with the disassembly window. I haven't changed the hardware or software at all. If I try and set a software breakpoint I get:
"Failed to set breakpoint in "TEST.c" on line 3293"
Steven J. Ackerman, Consultant
ACS, Sarasota, Florida