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ADF7021 Eval Software

Question asked by TimW Employee on Mar 3, 2010
Latest reply on Mar 15, 2010 by ConorOM

See attached files/screen shots.  Basically, the software is setting the demod divider to a 1, which sets the demod clock at 19.2MHz.  The data sheet says that the demod clock (2FSK) has to be less than 15MHz.  Was this an oversight in the software?

 

Thanks,

 

Tim

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