I'm working on a bf526 application using PPI & DMA to feed a TFT display with RGB data at ~24MB/second. The CDPRIO bit in the EBIU_AMGCTL register is set, otherwise the DMA sometimes fails to feed the PPI.
To the problem:
Now I want to use MDMA to clear the display buffer (located in SDRAM) while Core is running.
However that will stall the CPU totally, including the audio interrupt which is running at ~1000 interrupts per second.
So I need to find a way to either put Core priority between DMA0 and MDMA or slow the MDMA down. I have looked at two ways to do that so far without success:
1. Somehow forceDMA0 to urgent, and clear the CDPRIO bit.
2. Make the MDMA slower (MDMA_ROUND_ROBIN?) or make a fake peripheral to give some breathing room within the clear_screen transfer.
Also, since the clear_screen fills a memory area with 0's, Is there a way to avoid reading a word for every word to be written???
Any suggestions would be great!