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Link Port Registers

Question asked by Tom00 on Feb 10, 2010
Latest reply on Feb 10, 2010 by mue

Hello!

 

I have a problem to watch all Link Port Registers. If I add in VDSP link port register (Register->IOP->Link port) to the watch-list a "JTAG scan failed" error occurs (see below). I can watch the LSTATx and LCTL registers, but not RCLB0. The Communication with the Link Port works without any error.

 

I have tested two boards and both have the same errors. I am using VDSP 5.0 Update 7 and EZ-Board rev 0.2.

 

Please can anyone can help or verify this error on other boards?

 

Best regards

Thomas

 

 

 

 

            ********************************************

            *** 21469 EZ-Board Power-On Self-Test

            ********************************************

            Built on Feb  9 2010, at 14:23:40

            Built for rev 0.2 EZ-Board

            Configured PLL for 450 MHz CCLK, 225 MHz DDR2 clock

           

           

            Waiting for a test to be selected...0-0-1-0-0

            Test 4 selected

           

           

            ********************************************

            *** Link Port Test

            ********************************************

            Test settings:

               Connect link port cable between LINK PORT 0 and LINK PORT 1

           

           

            Transferring 2097152 bytes over the link port...

            Done transferring 2097152 bytes over the link port

            Test passed

            Link Ports: pass 1  fail 0

           

 

******************************************************************************

Try to watch RCLB0

******************************************************************************  

            JTAG scan failed - Check target power and emulator connection.

            Failed getting 32 Bit Memory

 

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