I am designing a board with four TigerSHARCs (ADSP-TS201). JTAG port of these DSPs will be
connected in the daisy-chaining fashion. In EE-68 application note, it is
stated that the traces between the JTAG header and the DSP should be routed
as a group using equal length. I have two related doubts:
1) I understand that all the JTAG signals for a DSP should be routed with
an equal length e.g., L0 for DSP0, L1 for DSP1, L2 for DSP2 and so-on. My
doubt is whether these lengths should be equalized across all DSPs i.e.,
Should I make sure that L0 = L1 = L2 or L0 can be different from L1 and L2
2) In daisy-chaining mode, TDO of DSP0 will be connected to TDI of DSP1.
How should I calculate the length of TDI signal for DSP1 in order to ensure
that other JTAG signals are routed with same length as of TDI signal?