I am desigining a board with four TS201 and a FPGA. DSPs and the FPGA are interconnected using the cluster-bus. I want to configure DSPs for EPROM boot. In my design I want to connect the EPROM to the FPGA. FPGA will act as a transparent interface between the DSPs and the FPGA during booting. My doubt is:
After power-on, FPGA will take some time to boot-up. Meanwhile after power-on-reset, DSP will try to boot through EPROM (reset signal for DSPs is independent of FPGA ). In case when FPGA is still booting up, DSP will not be able to access the FLASH. How will DSP react? Will it keep trying to boot from the EPROM until it is able to access EPROM?