I am debugging my application with VisualDSP++ on my BF561 on core A connected via HPUSB-ICE. I see, that when i step through the assembly, the cycle counter for core A increases for every instruction, but not by 1 but for about 10 cycles.
// set CYCLES to 0 manually
R7 = 0 // CYCLES is 0000000A here
P0 = R1 // CYCLES is 00000014
When i use the BF561 simulator, then the cycle counter is increased by 1 as expected.
Can anyone explain this behavior?