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Booting and DDR memory configuration on BF548M

Question asked by hmluk on Oct 28, 2009
Latest reply on Mar 24, 2010 by demonb

I am having issues with correct initialisation of the BF548M DDR controller when the system heap user heap and stack are in L3 memory. To start with there seems to be no documentation or examples of how the controller registers should be set up for Mobile DDR. By looking through the defines is some of the header files I found that there is an extra bit (bit 5) in the EBIU reset control register that need to be set. This is undocumented. The problem is when to set this bit. I have found that I have to have separate initialisation code for getting the processor to load from SPI Flash. This does not get run when developing code and down loading it through the emulator. How and where should I put this initialisation in my main code. I think it should be built in to the default initialisation for the processor, but there does not seem to be any difference between the BF548 and the BF548M. Have the tools not kept up with the hardware? I am not sure if I have described the problem very well but some insight into how to use L3 memory with the BF548 would be apreciated.

 

I also have a side issue with VDSP++ with removing startup code and LDF. Once introduced into a project it seems imposible to remove it again without deleting the porject and starting again. As anyone a cure for this?

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