For each pin of the processor BF518 different IBIS models depending on a driver strength are given.
As it is possible to control a driver strength?
Yes this is an error! You already guessed that this error is not just a slip of a finger on the keyboard in the comments section. Our intent was to remove this feature from the released products and delete it from all documentation. As implemented in today’s silicon, drive strength control is not functional.
Thank you for your many questions on this subject. It shows clear customer interest that should increase the importance of having working drive strength control in our future products.
The IBIS models contain min, max, and typical drive strengths that represent the possible range of process and temperature change in output strength. This allows board simulation to predict the possible range of slew rates, overshoots, and reflections.
For example, for pin D0 two models are given:NOUT_16 16mA bufferNOUT_12 12mA buffer
For each model the minimum, typical and maximum values are given.In the ADSP-BF51x Blackfin Processor Hardware Reference only NONGPIO_DRIVE register for control of a driver strength of pins SCL, SDA is described.Whether there are registers for management of a driver strength of other pins (for example, GRIO, EBIU)?
Let me answer your real question first. No we do not have drive strength control on EBIU or GPIO outputs. As you point out we do have some drive strength control for SDA and SCL that is adjusted depending on VDDEXT and the I2C bus voltage (what the pullup is connected to).
Perhaps I am looking at the wrong file and perhaps there is a mistake in another file. There are 6 IBIS files for the BF518 on our web. I am looking at BF51x_3_3_12x12_bga.ibs. I see that the model for D0 is NOUT_16. There is no model named NOUT_12. If you see a problem with our documentation, I would like to try and fix it with your help.
I looked a file bf51x_3_3_24x24_lqfp.ibs (IBIS ver - 3.2; File name - bf51x_3_3_24x24_lqfp.ibs; File Rev - 1.0; Date - 11/27/2008).
For BF527 processor there is a possibility to control a drive strength and a slew rate various groups of pins. It strongly facilitates maintenance of signal integrity on the printed-circuit board (especially slew rate). Why such control have not made for the BF518 processor?
I understand your appreciation of variable drive strength. Unfortunately, The IBIS file you mention was updated just a few days ago and is marked 9/16/2009. Likewise the BF527 does not support variable drive strength as shown in its current IBIS models although there may still be some reference to it in the Hardware Reference Manual.
In the file defBF51x_base.h there are following definitions:#define PORTF_DRIVE 0xFFC03220 /* Port F drive strength control */#define PORTG_DRIVE 0xFFC03224 /* Port G drive strength control */#define PORTH_DRIVE 0xFFC03228 /* Port H drive strength control */
Possibly, it is an error?
Retrieving data ...