I need to drive several high speed DDSs and IF receivers. In order to attain (very) low jitter/phase noise, I intend to use TCXO with <1 ppm stability. I use the scheme of CN-0121: Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers. However, in the CN-0121 the AD9520 is driven with a Xtal, and I want to use (10 MHz) TCXO to obtain 600MHz clock for to DDSs and the IF receivers.
Can some on help me with this?
Reference for design notes are welcome as well.
Thanks and smile in advance.