I am experiencing some problems with chained DMA. I'm DMAing from SDRAM to internal via the external port. I am using a SHARC 21369 in a mixed C and ASM project. The portions pertaining to the DMA are written in ASM. I am trying to to create a 4-part chained DMA. I feel as though I have set up my TCBs and initiated the transfer correctly. They are attached in the included text file.
After I run the DMA, I break at the completed interupt and check the External Port DMA Addressing registers for correctness. Everything looks correct and in order except for one bit. I see that both the Internal and external address have incremented by count and modify properly. That is with one small exception. The final value for the IIEP register should be BA72E. Instead it is 3A72E. This is a difference in the 19th bit. Is there any restrictions on the width or value of the IIEP register? The intended address points to a valid buffer in Data memory. I don't see what the problem here could be. Any ideas?
Thanks in advance,