I do have questions concerning the High Speed ADC to FMC Adapter Board (CVT-ADC-FMC_INTPZ PCBZ (Rev. B)) acting as the bridge between the AD9272 and the Xilinx Vitrex 7 Evaluation Board VC-707. This concerns the routing of the Adapter Board. While looking at the schematic for the Adapter Board it would seem that since DCLKA2+ and DCLKA1+ lead to DCLKA+ via 0 ohm resistors one has a choice of using either DCLKA2+ or DCLKA1+ (but not both) for routing to the FPGA board. This corresponds to using either the frame output clock (FCO) or the data output clock (DCO) of the AD9272 board. For my particular case I need the use of both clock outputs. How would I go about routing these two clock outputs to the FPGA board?