Thank you for the answer.
the output data of ADC are unsigned int16.
the fir takes the output of the code fragment.. this does not meke sense for me, because there positive and negative filter coefficient!
it seems that this 16bit data should be interpreted as signed 16bit value.
So the comparison <0x8000 check if the value is positive(signed bit not set) adn if this is so the code modify
this value to be negative and vice versa. but if the format is "two's complement" this code is not correct to
do this. "two's copmplement" http://en.wikipedia.org/wiki/Two's_complement
take a look at the format that is requested by the fir_fract16 function and the format of the ADC-converter values. The only purpose of this code fragment is to invert the signal. Which is obsolete for the fir filter i think !
best regards chris
is this code working as expected ? in addition in VDSP you could check your data grafically by selecting a plot in View/Debug Windows/Plot->new.
So you create the plot and set a breakpoint before your code fragment is called and then a breakpoint after the processing steps. Provide a sinoid signal if possible to the ADC. But i think this part could be skipped !
you have to look at the definition of your fir function
if you use the build_in function fir_fr16() than you have to use fract16 data types.
this are 16bit signed 1.15 fract (look at the description in help -Using Data Storage Formats)
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