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ADV7623 OSD bit mapping question

Question asked by ChrisO on May 28, 2013
Latest reply on May 30, 2013 by ChrisO

Hello All.

 

Sorry to spam the group but I am hoping to get a sanity check regarding the ADV7623 OSD functionality.  I'm not sure if I have bugs or if there are errors in the documentation that I have not identified.   I’m working with the ADV7623 OSD Software Programmer's Guide - August 2011.

 

Page 12:
TBox RAM structure
[0:4] Horizontal size in pixels
[5:16] Vertical size in pixels
[17:26] Priority

 

Page 12:
IBox RAM structure
[0:4] Priority
[5:16] Horizontal size in pixels
[17:26] Vertical size in pixels

 

It appears that the TBox RAM structure is not documented correctly.  Is this a safe assumption or am I really missing something?

 

My other question is the mapping of the RAM structure (e.g. IBox) bits for writing to ADV7623 RAM via SPI.

 

Page 15:
Writing to ADV7623 RAM via SPI 4th and next bytes
send bits [26:19]
send bits [18:11]
send bits [10:3]
send bits [2:0,5'd0] (5 lsb padded 0's)

 

I understand MSB (most significant byte) is sent first but do I need to reverse the bit order of my IBox RAM structure above when writing it via SPI?  The RAM structures (e.g. IBox) are listed as LSB to MSB (e.g. [0:4] vs. [4:0]).  So I guess what I am asking how do I massage the IBox data to send via SPI…

 

Thank you!!

 

- Chris

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