I can't find this info in DS.
The ADuM7640 contains a refresh feature which guarantees DC correctness:
If the ADuM7640 is powered and the inputs are static, the correct state will be reflected at the outputs in approximately 1 ms.
But I can't understand the words: "If the decoder receives no internal pulses for more than approximately 5 μs, the input side is assumed to be unpowered or nonfunctional, in which case the isolator output is forced to a default high state by the watchdog timer circuit."
We really have static signal (or very slow signal, for example 1kHz). So input decoder don't recieve pulses more then 5us, and (as I see from this DS paragraph) the input side is assumed to be nonfunctioanal and the output is forced to a defaukt high state. Can you comment this question?
A simplified block diagram for the ADuM764x is shown here:
Refresh pulses are generated if the input is static or transitioning slower than ~500 kHz. The watchdog timer on the output side expects to see pulses on the decoder output at least every 1 ms, from the input signal or from the refresh. If the watchdog doesn't see any pulses for ~ 5 ms then it is assumed that the input side is unpowered or there is a problem, and the outputs are forced to a default high state.
In your case where the input is static, the refresh circuit will generate pulses every 1 ms and the watchdog will see them. As long as power is applied on the input side the output will continue to reflect the correct state.
Hi, I was wondering the same question. You answered well but there is two things I didn't understand. I am in the same configuration where my component is always powered but there is sometimes static signals on inputs.
My first question is : what do you mean by correct state in :
In your case where the input is static, the refresh circuit will generate pulses every 1 us and the watchdog will see them. As long as power is applied on the input side the output will continue to reflect the correct state.
Correct state on the output is the state applied on the input , is it correct?
My second question is :
When the component doesn't see logic transition on the input, it does his test by sending periodic refresh pulses. Does that periodic resfresh pulses are applied and seen on the output? .. which that would be a problem..
Yes, correct state means the output matches the input.
I'm sorry I don't understand the second question. Can you rephrase or provide a diagram to clarify?
Thank for your answer DaveC.
My second question is kind of the same question than the first one. But I am not sure enough then I try to reformulate my second question:
Your device is able to do an autotest to verify if the intput side is still well-powered, this is in the case where it does not detect edges on an input during 1uS.
For that, it generates a periodic pulses in the refresh box which is send in the other side. The component checks on the output side, in the watchdog box, if it has received the periodic pulses. Is that right?
I would like to know, if during this test, those "autotest periodic pulses" affect the outside of my component.
In other words: during the autotest time, the outputs will still match the inputs? (even if those inputs are statics )
The output should always match the input (within the normal propagation delay limits) when the part is operating correctly and both sides are powered.
I was planning to use the same part(ADuM7640) in a project of mine, and I had the same doubt regarding the transmission of a static high or low signal via the part. I read your reply on this post and from what I understand, the part can keep on transmitting a static HIGH or LOW signal from the input side to output side indefinitely, thanks to the generation of refresh pulses, as long as the input side is powered.
Can you please say if I'm correct in my assumption that, the only scenario where the situation mentioned in the following statement occurs:"If the decoder receives no internal pulses for more than approximately 5 μs, the input side is assumed to be unpowered or nonfunctional, in which case the isolator output is forced to a default high state by the watchdog timer circuit.", ie the only scenario of the decoder ending up receiving no internal pulses for>5us, is when the supply isn't applied at the input side. If the supply is applied, and a static HIGH or LOW signal is applied at the inputs, the refresh pulses ensure the output correctly reflects the static input indefinitely. Can you please confirm if my understanding is correct
Your understanding is correct. As long as the input side is powered, a dc state will be reflected across the barrier to the output indefinitely. This is true approximately 1 us after power is applied.
Thanks a lot for the details. It is fully clear now
In my case also same to the above one & I am planning to use ADUM7643 in my application where it will be used to receive & re transmits the 500Hz periodic pulses from the filed to FPGA. Based on the above conversion I presumed that this device will able to re transmits DC signal also provided that both the sides should be powered. Please correct me if I am wrong ?
You're correct - the ADuM7643 will transmit a DC state as long as both sides of the isolator are properly powered.
Ok good. Here is my last question , but I think I have already the answer.
Is it possible, for the ADuM3210 for example, to use only one input of the two available?
he unused input should be left unconnected, right?
Thank you DaveC
Yes, but we would recommend tying any unused inputs high or low. I typically do this using a 1 kohm resistor.
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