My Customer Wrote:
We are trying to set up the ADV7181D device (HDE-8 Encoder).
In reference to the "ADV7181D_Manual_Rev0.pdf" document (see attached), page 20, table 4 shows the register setting for Component YUV (CP Core) is PRIM_MODE[3:0] = 0000.
Looking at the same page, table 5 shows that PRIM_MODE[3:0] = 0001 is required for using the component processor mode (CP Core).
Page 20 , table 4 shows the setting for INSEL[3:0] = 0000, with Y=Ain10, U=Ain8, V=Ain6 (CP Core).
On page 217, the above register setting shows that it would select CVBS on AIN2 (SD Core).
Page 229 "0x3B Bias Control" register: This states that a external resistor can be used.
What pin is this resistor located on?