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TS201 cache flush

Question asked by MOHOMAX on May 20, 2013
Latest reply on May 22, 2013 by MOHOMAX

I use part of internal memory in TS201 as a buffer to save some debug info. Section address is 0xC1000 size is about 1000 words. Idea is that when application is running it writes to this buffer some statistics. And when application crashes I can download other firmware to that DSP and read debug info from known place.

 

I found that when application uses cache, this debug idea doesn't work. When I comment macros "cache_enable(750)" everything works fine. I suppose that's because all debug info I write to debug section goes to cache and doesn't go to phisical RAM. That's why when application craches and I read data from debug area (address 0xC1000) I can't find anything.

 

How can I flush cache to be sure that data will be written to phisical RAM? I found that there is __builtin_flush for Blackfin processor, but I can't find such function for ADSP TS201.

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