I'm designing a board including a pair of AD1974 ADCs in an auxiliary capacity. I'd like to use them in standalone mode with our existing clocks:
MCLK = 24.576MHz
BCK = 6.144MHz
LRCK = 96kHz
This puts MCLK at 256*fs.
First, are these clock rates valid in standalone mode? In the AD1974 datasheet, pg. 11 describes going to 128*fs for fs = 96kHz. However, pg. 12 claims that standalone mode only supports 256*fs.
Second, how should the PLL filter be configured in this mode?