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ZYNQ ZC702 - PL design only

Question asked by Britren on May 16, 2013
Latest reply on Aug 14, 2014 by rejeesh

Hello everyone,

 

If I firstly want to start to use only the PL part of the ZYNQ, could you tell me I necessarily have to do something with XPS. if yes, what? Maybe I have to generate the netlst but why if I am not using the PS peripherals?

 

I think I just have to create a VHDL file with Plan ahead and to define the I/Os in a constraint file? Am I right?

 

I tried but during the implementation, the following message has been returned for every I/O that I tried to connect.

  • [Constraints 18-11] Could not find net or pin ...

Thank you for your help.

 

Regards,

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