rejeesh

ADI PCORES Register Map

Discussion created by rejeesh Employee on May 15, 2013

Hi,

 

We are in the process of migrating our cores to a common register map. If you have any inputs (suggestions, comments and/or questions) please let us know. We will be glad to hear from you and any feedback is very much appreciated.

 

http://wiki.analog.com/resources/fpga/xilinx/hints/pcore_register_map

 

Thanks,

Rejeesh

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