I have an FPGA with 32bit output to program up to four AD9914 DDS - I want to program as fast as possible so I plan to use 32 bit wide mode. ideally, I would like all AD9914's to share the same 32 bit bus, and use a MUX function to select which device is porgrammed (limited pins on FPGA). I do not see an enable/disable mode in the function pins F[3:0], or a chip enable pin. Please advise.
I want to use the programmable modulus mode, so this means wrting the 32 bit word twice - correct? The input freq word resolution to the FPGA is <14bits; I expect the FPGA LUT to convert the input word to 64 bits necessary for prog-modulus mode. I expect the 32 bit bus can operate at 100MHz, so the time per devcie is around 20nsecs - is this correct?
If the freq tuning words are passed to the FPGA by a 2.4G PCI link, the total time is on the order of:
Pass Freq Word to FPGA: (4*14 /2.4G) = 25nsecs
Four cycles of 20nsecs to program DDS = 80nsec
DDS latency: 320 cycles @3.2GHz =100nsec
Is the above reasonable? I have > 350 nsecs time budget.