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AD1445 ASRC Lock status bits

Question asked by rong on Sep 30, 2009
Latest reply on Oct 7, 2009 by BrettG

It seems those lock status bits on AD1445 (reg 0xE101, 0xE141) are not updated or not reflecting the realtime lock status. I'm using both ASRCs on AD1445 to synchronize two slightly out-of-phase clocks (both are 48Khz), one for input data and the other for output data. I can get data in and out properly, but the ASRC lock status bits are always stuck in 0. According to the datasheet, if the lock status is 0, the ASRC will automatically mute itself, aparently it didn't. Are these lock status bits reliable? or should I not worry about it even if they are 0s?

 

Speaking of registers, I remember one other issue, which is the Watchdog Value 2, I couldn't seem to be able to update the upper 8bits of that register. The datasheet says it's 16 LSBs of the watchdog maximum count. It's more like it was 16 MSBs and only 24 bits of watchog count were allowed.

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