I have combined u-boot and BF609_MCAPI_msg_CORE1.dxe as "test_mcapi.html" said: use the below command, and set boot-mode to nor flash to start the system.
bfin-elf-ldr -T bf609-0.0 -c DualCoreTest_uboot.ldr u-boot BF609_MCAPI_msg_CORE1.dxe --bmode PARA --use-vmas --initcode arch/blackfin/cpu/initcode.o -J --punchit $((0x8000)):$((0x8000)):env-ldr.o
But now the question is: (1)coreB starts its code in nor flash, or (2)coreB loads its code in 'sram or DDR" and starts?
If coreB loads its code in sram or DDR, then (a)whick address coreB loads its at? and (b)How to set this address?
I thought coreB may starts in nor flash, but NOT sure about it because coreA mayuses this nor flash when uClinux starts( One flash can be use by two cores at runtime?)