This is on a Zedboard with Linux.
(a) I downloaded prebuilt image from http://wiki.analog.com/resources/eval/user-guides/ad-fmcomms1-ebz/quickstart/zynq and both RX and TX work fine.
(b) I took prebuilt system.bit from March 7 commit of https://github.com/analogdevicesinc/fpgahdl_xilinx and bootgen'ed it with u-boot and FSBL file extracted from image in step (a) above to create a new BOOT.BIN file. Both RX and TX work fine
(c) Next, I regenerated a system.bit from the HDL of March 7 commit. I went through the steps involving Coregen etc. and the system.bit file was generated without any errors. I created new BOOT.BIN as in step (b) by combining this system.bit with u-boot and FSBL files from step (a). However, now the TX works but not the RX. I can see nice 40MHz single sideband signal on the spectrum analyzer. But the ADC data is junk. On playing with RX settings, such as on changing RX LO frequency, the console starts giving an error and never recovers:
evice5/buffer# cf_axi_adc 79020000.cf-ad9643-core-lpc: timeout: DMA_STAT 0x1, AD
I am trying to modify the project for my needs, and as first step I need to be able to use the golden HDL code on your github. From a design of experiments perspective, steps (a) and (b) tell me that hardware and boot.bin generation procedures are OK. I must be doing something wrong in creating the system.bit file ( tried with both XPS 14.4 and XPS 14.5), but I get no errors ( lots of warnings though).
Any pointers on what I should try?