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What is the approximate lock time for the internal PLL in AD9125

Question asked by Vishnu on Apr 23, 2013
Latest reply on May 21, 2013 by Tguy

Hi,

 

I'm using a 100MHz reference to DAC I/P and using the internal PLL for multiplication by 4.

I've used the recommended PLL Settings as given in Table 4 of the datasheet, but the lock times are varying in time and piece to piece.

Can I have a specification for the lock time.

 

Regards,

Vishnu

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