in the manual named "ADSP-214xx_hwr_r1-0", page 464. or 8-24. we have such a description.
"The PWM_SYNCENx bits in this register can be used to start the counter without
enabling the outputs through PWM_EN. So when PWM_ENx is asserted, the
4 PWM outputs are automatically synced to the initially programmed
period. In most cases, all SYNC bits can be initialized to zero, enabling the
PWM_ENx bits of the four PWM groups at the same time synchronizes the
The PWM sync enable feature allows programs to enable the PWM_SYNCENx
bits to independently start the main counter without enabling the corresponding
PWM module using the PWM_ENx bits. To synchronize different
groups, enable the corresponding group’s PWM_ENx bit at the same time. In
order to stop the counter both the PWM_DISx and PWM_SYNCDISx bits should
be set in this register."
1). what i understand is that PWM_SYNCENx controls the counter and PWM_ENx controls the output, but when you enables PWM_ENx the counter is automatically set to initially programmed period. is this correct?
2). this initially programmed period i reckon should be 0. for the counter always starts at 0. is this correct? or how can i change it?
3). instead of having 1 control bit for both counter and output, you choose to have 2 bit to control them individually. And the behaviors of these 2 approach are identical to me. what is the reason for this? can you give me an example of such a application that require this feature?