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Adjust TWI timings on BF518

Question asked by Marc_0 on Apr 12, 2013
Latest reply on Apr 12, 2013 by Prashant



We are having troubles with our BF518 board on the I2C bus: the BF interfaces to a few I2C slaves and from time to time we get NACK or arbitration losses. We suspect that one of our slaves (a CS8422 chip) sometimes misses the STOP condition and then interferes with the next transfer.


The I2C specification mentions that "tSU;STO" must be at least 4.0 us. With a scope, we observe something like 4.1 us at the output of the BF, which is correct. But the CS8422 datasheet mentions a minimum time of 4.7 us, and thus it could miss the STOP output by the BF.


In order to validate our hypothesis, we would like to make the STOP setup time longer at the output of the BF. But we didn't find any register to modify the I2C timings in the BF518 manual. Are there some kind of hidden registers to perform this operation ?


Thanks in advance.


Best regards,