We have a critical design query related to SPI interface. In our board we have SPI interface from a host processor shared across AD1974 and another NON-AD SPI slave device. The SPI interface is connected in parallel i.e. MISO, CLK, MOSI are shared and chip select signals are different.
The NON-AD SPI slave device gives out the same data that it receives at input MOSI pin on the shared MISO line. This is true even if this device's chip select is not asserted. Can AD1974 co-exist with such a SPI slave device whose MISO pins are not tri-stated when not selected by chip select?
Your quick response would be very much appreciated.