I went thru and read part of the data sheet for ADF4351. I am particularly interested in 116.5 MHz and like to ask few questions:
1. Seems to me per data sheet, I should be able to use integer PLL and lock the PLL with VCO frequency of 3728 and then use divide by 32 to get 116.5 MHz. Is it true?
2. Data sheet from Page 9 says loop filter bandwidth is 63 kHz. Is it true? Eval board loop filter components are set for what value? If not, am I populating the values?
3. Phase Noise is shown around -125 dBc, I should expect about same from 116.5 MHz. Please let me know if not true.
4. What is the Lock time can I expect; I guess we can also set it up for fast lock mode too.
5. I am assuming you have Reference Crystal on the EVAL board – True or False. I believe you have it and what’s the frequency?
6. If I want to put a shield on the board, would it be too hard to come up with something? I will do all the work on this?
7. Later on if I wanted sweep the frequency from like 100 MHz to 500 MHz, do the loop filter value need modifications?
8. I did not see any REF frequency spurs in the integer plots; what’s the scoop here.