The SFL pin has several different modes including color subcarrier DDS, timing reset and subcarrier reset.
We are outputting NTSC data from an FPGA to the ADV7391.
Do we need to drive the SFL pin and if so what mode?
Can I just tie SFL low?
I don't see why you would need it if your video is coming from an FPGA but if it were me, I'd tie it to an FPGA pin, with a pull-down just in case.
Related thread: http://ez.analog.com/message/14430#14430
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