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SSM2604 ADC output

Question asked by manjudn on Apr 4, 2013
Latest reply on Apr 17, 2013 by ColemanR

We are seeing a new issue in our product in production line related to SSM2604 and this issue is observed in the factory and we have a line down situation because of this issue.

 

As part of manufacturing flow the factory is verifying the functionality after assembly is done. We are seeing failure with Audio capture functionality of SSM2604 (ADC output). This failure is seen in 1 out of 4 boards in the production line.

 

Interestingly this issue occurs only once after first power ON, If the board is power cycled, we were not able to reproduce the issue.

 

We tried to analyze the issue with one of the boards and found that in the failed condition, the RECDAT output is generating a fixed pattern and the waveform captured is attached (ssm2604_data_fail.jpg). The BCLK and RECLRC clocks are respectively 3Mhz and 48kHz which are expected and match the behavior of a working case. But the ADC data out is showing the unexpected behavior as in attached waveform.

 

I have attached section of schematics (SSM_Sch.JPG) for your reference. Also I have attached the register dump (SSM_Issue.txt) to show the programmed values inside SSM2604. This dump was captured in the failed condition and this matches with the register dump taken in the working case.

 

Here is the date code read from the package top for your reference:

#1245

88359

 

  Request you to provide urgent help to debug the issue.

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