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AD7192 analog inputs (AIN1 ... AIN 4) current flow out problem

Question asked by gaph.tan on Apr 2, 2013
Latest reply on Apr 15, 2013 by gaph.tan

I am facing AD7192 analog inputs (AIN1 ... AIN 4) current flow out problem.

 

The attachment is my ADC schematic design. The ADC SPI pins are controlled by Altera CPLD.

 

May I know why there's current flow out from analog inputs from AD7192? I using default AD7192 register setting, where the buffer is ON.

 

Any suggestion for my schematic design if I use Altera CPLD to control AD7192?

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