AnsweredAssumed Answered

adc_data and adc_mon_data in cf_adc_2c.v ?

Question asked by jmatai on Apr 1, 2013
Latest reply on Apr 4, 2013 by jmatai

Hi All,

 

I just wondering contents of adc_data_s and adc_mon_data signals in cf_adc_2c.v ? Clearly adc_data_s is 64 bit data and adc_mon_data is 32 bit data. Both of them is output from cf_adc_wr.v module. In the cf_adc_wr.v, the adc_data(adc_data_s) and adc_mon_data are assigned as below.

 

The reason I am asking is when I monitor adc_data_s in chipscope (I am monitoring 32 bits of adc_datas because that is the part equal to adc_mon_data), I getting output from chipscope as shown 5Mhz_signal.jpg. But I expect to get something like 5Mhz_nice_wave.jpg.  5Mhz_signal.jpg

What I am getting.

5Mhz_nice_wave.jpg

What I expect to get.

 

Inside cf_adc_wr.v

 

  assign adc_mon_valid = 1'b1;

  assign adc_mon_data = {adc_data_b_s, adc_data_a_s};

 

 

  // the adc channel select let you pick a particular channel -

 

 

  always @(posedge adc_clk) begin

    adc_usr_sel_m1 <= up_usr_sel;

    adc_usr_sel <= adc_usr_sel_m1;

    adc_ch_sel_m1 <= up_ch_sel;

    adc_ch_sel <= adc_ch_sel_m1;

    adc_cnt <= adc_cnt + 1'b1;

    case (adc_ch_sel)

      2'b11: begin // both I and Q

        adc_valid <= adc_cnt[0];

       adc_data <= {adc_data_a_s, adc_data_b_s, adc_data[63:32]};

      end

      2'b10: begin // Q only

        adc_valid <= adc_cnt[1] & adc_cnt[0];

        adc_data <= {adc_data_b_s, adc_data[63:16]};

      end

      2'b01: begin // I only

        adc_valid <= adc_cnt[1] & adc_cnt[0];

        adc_data <= {adc_data_a_s, adc_data[63:16]};

      end

      default: begin  // user data

        adc_valid <= usr_data_valid;

        adc_data <= usr_data;

      end

    endcase

  end

Outcomes