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ADF4150 phase resync

Question asked by briankomo on Apr 1, 2013
Latest reply on Apr 4, 2013 by Grzegorz.Wawrzola

I have a customer using the ADF4150 in a project and they want to utilize the phase resync function. The PLL is setup for fractional N, but at times the modulus is set to 0 when they hit a frequency that is a exact multiple of the reference. Is there any harm in leaving the phase resync function on, and if so, what should they do with the CLK_DIV_VALUE and CLK_DIV_MODE in that case to insure that the phase between my reference and output RF is the same for non-zero values of mod and mod = 0?

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