I have a customer using the ADF4150 in a project and they want to utilize the phase resync function. The PLL is setup for fractional N, but at times the modulus is set to 0 when they hit a frequency that is a exact multiple of the reference. Is there any harm in leaving the phase resync function on, and if so, what should they do with the CLK_DIV_VALUE and CLK_DIV_MODE in that case to insure that the phase between my reference and output RF is the same for non-zero values of mod and mod = 0?

Hi,

To keep the phase resync working, the modulus has to be different than zero.

For the channels where the output frequency is an exact integer multiple of the reference frequency, only the fractional has to be set to zero, while the value of modulus can be different than zero, as the FRAC / MOD ratio will be set to zero in this case.

So for integer channel, when FRAC = 0, keeping Modulus value different than zero will allow using the phase resync the same way as for fractional channel.

Regards

Grzegorz Wawrzola