I see the KC705/VC707/ZC702 listed as compatible platforms for the AD9671 reference design. Is the AC701 platform also compatible?
It may be better if we use your FMC board on AC701 rather than the evaluation board? The GT core has been changed to support both GTX and GTH - just need to add GTP. Let me see what I can do.
Thanks for pointing that out- I have fixed the block diagram. The design is compatible with VC707 and ZC706 - as it is - but NOT ZC702. AC701 has only 2 GTPs on FMC. Also the primitives are different - so the design as it is will NOT work on AC701.
Thank you for looking into the compatibility issue with the AC701. The AD9671 can be configured to use only 2 lanes but there would be other modifications due to the primitives being different.
A few things. Our design uses the Xilinx JESD204B block.
Artix isn't listed - so I don't know if Xilinx has tested it on this platform. (We were the first to run it on ZC706, but since it uses Kintex GTX I/O - that was relatively easy).
Specifically - the AC701
FMC-HPC (Partially Populated) connector
Page 13 has the comparisons between GTP and GTX. I don't know if any of the missing functions are used in the Xilinx JESD204B IP.
I will try to find out.
Xilinx JESD204B block can work on Artix, GTX and GTP don't have too much difference, and the Xilinx JESD204B block just use the GTX/GTP as its PHY.
Xilinx added pre-production support of GTP in 2013.1 but hasn't finished the HW validation yet -- I think this is expected in the 2013.2 release.
Is there any update on the HW validation of the Artix JESD204B?
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