Reset control unit supports below resets under System Reset.
The RCU_STAT.SWRST bit indicates that a system reset (which was triggered by software) has occurred since the last time a hardware
reset occurred or since the RCU_STAT.SWRST bit was cleared by software.
Assumption: When you set RCU_CTL.SYSRST then software reset will be performed.
System Source Reset.
The RCU_STAT.SSRST bit indicates that a "system reset triggered by hardware in the system clock domain", clock A domain, or clock B
domain has occurred since the last time a hardware reset occurred or since the RCU_STAT.SSRST bit was cleared by software.
The RCU_STAT.HBRST bit indicates that a hibernate reset has occurred since the last time a hardware reset occurred or since the RCU_STAT.HWRST bit was cleared by software.
The RCU_STAT.HWRST bit indicates that a hardware reset has occurred.
Assumption: If ~RESET is asserted(Low to High) then Hardware reset will be performed
Hibernate Reset shall be set whenever Hardware Reset bit is cleared. But What is the purpose of setting Hibernate Reset bit after Hardware Reset?
I am not much clear with RCU_STAT.HBRST and RCU_STAT.SSRST. Can you please elaborate clearly.
Thanks in advance.